To SET the latch (Q = 1), a momentary LOW signal is applied to the S input while the R remains HIGH. Latch initially SET 0 1 0Īssume the latch is initially RESET (Q = 0) and the inputs are at their inactive level (1). Latch initially RESET 1 0 0 0 0 1 To RESET the latch (Q = 0), a momentary HIGH signal is applied to the R input while the S remains LOW. To SET the latch (Q = 1), a momentary HIGH signal is applied to the S input while the R remains LOW. 0 0 1 Assume the latch is initially RESET (Q = 0) and the inputs are at their inactive level (0).
R R Q Q S S Q Q Summary Latches The active-HIGH S-R latch is in a stable (latched) condition when both inputs are LOW. R Q Q S NOR Active-HIGH Latch NAND Active-LOW Latch With NOR gates, the latch responds to active-HIGH inputs with NAND gates, it responds to active-LOW inputs. It can be constructed from NOR gates or NAND gates. The S-R (Set-Reset) latch is the most basic type. S Q Q R Summary Latches A latch is a temporary storage device that has two stable states (bistable). Introduction to Digital Signal Processing.Īppendix B: Error Detection and Correction Codes.Digital Fundamentals Tenth Edition Floyd Chapter 7 © 2008 Pearson Education Boolean Algebra and Logic Simplification.ġ3. Table of Content of Digital Fundamentals 10th Edition Pdf Free DownloadĢ.
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